Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today’s digital designs. ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system.
It is a valuable resource for any designer who simulates multi-chip digital designs.
| ISBN: | 9780125105811 |
| Publication date: | 23rd October 2004 |
| Author: | Richard CEO, Free Model Foundry Munden |
| Publisher: | Morgan Kaufmann Publishers In an imprint of Elsevier Science & Technology |
| Format: | Paperback |
| Pagination: | 336 pages |
| Series: | Systems on Silicon |
| Genres: |
Electronic devices and materials |
Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today’s digital designs.
ASIC and FPGA Verification features in the following genres: Electronic devices and materials
Paperback. Not Available.
ASIC and FPGA Verification was written by Richard CEO, Free Model Foundry Munden and published by Morgan Kaufmann Publishers In an imprint of Elsevier Science & Technology
ASIC and FPGA Verification has 336 pages
Yes it is part of Systems on Silicon series